TSMC's N2 Technology
(ieee.org)
TSMC described its next generation transistor technology this week at the IEEE International Electron Device Meeting (IEDM) in San Francisco. The N2, or 2-nanometer, technology is the semiconductor foundry giant’s first foray into a new transistor architecture, called nanosheet or gate-all-around.
TSMC described its next generation transistor technology this week at the IEEE International Electron Device Meeting (IEDM) in San Francisco. The N2, or 2-nanometer, technology is the semiconductor foundry giant’s first foray into a new transistor architecture, called nanosheet or gate-all-around.