Zero ASIC launches first open standard eFPGA /w open-source bitstream, toolchain
(zeroasic.com)
Cambridge, MA – March 18, 2025 – Zero ASIC, a U.S. semiconductor startup on a mission to democratize silicon, has announced PlatypusTM, the world’s first open-standard eFPGA IP product.
Cambridge, MA – March 18, 2025 – Zero ASIC, a U.S. semiconductor startup on a mission to democratize silicon, has announced PlatypusTM, the world’s first open-standard eFPGA IP product.