Hacker News with Generative AI: RISC-V

Framework laptops get modular makeover with RISC-V main board (theregister.com)
The modular Framework laptop is moving outside the x86 world with a RISC-V main board now available.
DeepComputing: Early Access Program for RISC-V Mainboard for Framework Laptop 13 (deepcomputing.io)
DeepComputing is excited to announce the launch of an exclusive early access program for the DC-ROMA RISC-V Mainboard, specifically designed for industry and business customers.
RISC-V Motherboard for Framework 13 Pricing Starts at $368 in Early Access (phoronix.com)
Framework Computer has been promoting a RISC-V motherboard option for their Framework Laptop 13 to complement their existing Intel Core and AMD Ryzen motherboard options.
RISC-V Vector Extension overview (0x80.pl)
The goal of this text is to provide an overview of RISC-V Vector extension (RVV), and compare — when applicable — with widespread SIMD vector instruction sets: SSE, AVX, AVX-512, ARM Neon and SVE.
RISC-V Vector Extension overview (0x80.pl)
The goal of this text is to provide an overview of RISC-V Vector extension (RVV), and compare — when applicable — with widespread SIMD vector instruction sets: SSE, AVX, AVX-512, ARM Neon and SVE.
Redox OS gets RISC-V support (phoronix.com)
The Redox OS open-source Rust-based operating system project is out with their newest monthly development update.
RISC-V SiFive P550 CPU Demoed with AMD Radeon RX 7900 XTX GPU in Debian Linux (tomshardware.com)
TSMC reportedly cuts off RISC-V chip designer linked to Huawei accelerators (theregister.com)
Taiwan Semiconductor Manufacturing Co. has allegedly cut off shipments to Chinese chip designer Sophgo over allegations it was attempting to supply components to Huawei in violation of US sanctions.
Working with Igalia to Improve RISC-V LLVM Continuous Integration (riseproject.dev)
The LLVM project provides a very widely used and actively developed suite of compiler and toolchain technologies: including Clang, the LLVM middle-end optimizer and backend code generator, MLIR, LLD linker, and much more. While RISC-V LLVM support has progressed significantly, a key area that needed attention was the limited level of continuous integration (CI) for the RISC-V target.
Nvidia to ship a billion of RISC-V cores in 2024 (tomshardware.com)
RISC-V is currently slow compared to modern CPUs (benhouston3d.com)
After watching the rise of ARM displace Intel from most of my personal and server computing, I've been following the RISC-V architecture with intense interest. It's an exciting open-source ISA that has the potential to reshape the CPU landscape, but there's an important caveat: RISC-V is currently quite slow compared to modern CPUs in 2024. It is even slow compared to Raspberry PI boards.
Open-Source, Chiplet-Compatible RISC-V Controller (semiengineering.com)
A new technical paper titled “ControlPULPlet: A Flexible Real-time Multi-core RISC-V Controller for 2.5D Systems-in-package” was published by researchers at ETH Zurich and University of Bologna.
RISC-V Announces Ratification of the RVA23 Profile (riscv.org)
Santa Clara, Calif. – Oct. 21, 2024 – RISC-V International, the global standards organization, today announced that the RVA23 Profile is now ratified.
You can run Linux on the RISC-V cores of the Raspberry Pi Pico 2's RP2350 (xda-developers.com)
BinSym: Symbolic execution for RISC-V machine code based on LibRISCV ISA model (github.com/agra-uni-bremen)
BinSym is a program analysis tool which enables symbolic execution of binary code.
A Lisp compiler to RISC-V written in Lisp (ulisp.com)
This is a simple experimental Lisp compiler, written in uLisp, that will compile a Lisp function into RISC-V machine code. You can run the compiler on the RISC-V core of a Raspberry Pi Pico 2 (or another RP2350-based board):
Software-defined processors: the promise of RISC-V (redhat.com)
It’s an exciting time to be involved in open source.  Linux powers the world’s most critical devices, a story to which Red Hat has always been a champion.  Today we look further afield.  We look to a world of not what “is” but what “could be”.  It’s informed by the path we’ve walked and the lessons we’ve learned along the way.  It’s a story of re-aligning goals in the spirit of community.
MikroPhone: A privacy enhanced, simple and featured RISC-V mobile phone (mikrophone.net)
The goal of this project is to develop a privacy enhanced, simple and fully featured mobile phone. For more information about the project see about page.
A Bendy RISC-V Processor (ieee.org)
For the first time, scientists have created a flexible programmable chip that is not made of silicon.
Bendable non-silicon RISC-V microprocessor (nature.com)
Semiconductors have already had a very profound effect on society, accelerating scientific research and driving greater connectivity.
A Bendy RISC-V Processor (ieee.org)
For the first time, scientists have created a flexible programmable chip that is not made of silicon.
Linux Preparing Support for the RISC-V Framework Laptop 13 (phoronix.com)
Back in June it was teased that Framework Computer in collaboration with DeepComputing would be releasing a RISC-V motherboard for the Framework Laptop 13.
Sipeed NanoKVM: A RISC-V stick-on (jeffgeerling.com)
This is the Sipeed NanoKVM. You stick it on your computer, plug in HDMI, USB, and the power button, and you get full remote control over the network—even if your computer locks up.
SiFive shifts from RISC-V cores for AI chips to designing its own accelerator (theregister.com)
SiFive, having designed RISC-V CPU cores for various AI chips, is now offering to license the blueprints for its own homegrown full-blown machine-learning accelerator.
$149 RISC-V Tablet Runs Ubuntu 24.04 (omgubuntu.co.uk)
DeepComputing has unveiled a new version of its DC-ROMA RISC-V tablet — and this one runs Ubuntu!
LuaJIT PR: Add Support for RISC-V 64 (github.com/LuaJIT)
This patchset adds full interpreter and backend support for RISC-V 64 G(IMAFD) with LP64D ABI on Linux, with compile-time/runtime extension support for RVC, Zba, Zbb, Zicond, XTheadBa, XTheadBb, XTheadCondMov and XTheadMac.
Using RISC-V cores on the RP2350 MCU – blinking an LED to building Linux (cnx-software.com)
Jesse Taube Gets Linux Running on the Raspberry Pi RP2350's Hazard3 RISC-V Cores (hackster.io)
PyPy gets a new RISC-V JIT back end (pypy.org)
Linux Up and Running on the Raspberry Pi RP2350's Hazard3 RISC-V Cores (hackster.io)