Rocky Linux 10 Will Support RISC-V
(rockylinux.org)
We're excited to announce that Rocky Linux 10 will officially support RISC-V!
We're excited to announce that Rocky Linux 10 will officially support RISC-V!
Show HN: Confidential computing for high-assurance RISC-V embedded systems
(github.com/IBM)
ACE-RISCV is an open-source project, whose goal is to deliver a confidential computing framework with a formally proven security monitor.
ACE-RISCV is an open-source project, whose goal is to deliver a confidential computing framework with a formally proven security monitor.
Red Hat partners with SiFive for a RISC-V developer preview of RHEL 10
(redhat.com)
Red Hat has collaborated with SiFive to reveal the developer preview of Red Hat Enterprise Linux (RHEL) 10 on the popular SiFive HiFive Premier P550 platform.
Red Hat has collaborated with SiFive to reveal the developer preview of Red Hat Enterprise Linux (RHEL) 10 on the popular SiFive HiFive Premier P550 platform.
Mobile, Open Hardware, RISC-V System-on-Chip (SoC) Development Kit
(crowdsupply.com)
Precursor is an open hardware development platform for secure, mobile computation and communication.
Precursor is an open hardware development platform for secure, mobile computation and communication.
Implementing a RISC-V Hypervisor
(seiya.me)
To implement a seamless Linux integration into Starina, I decided to go with a Linux lightweight VM approach similar to WSL2. This means I need to implement a hypervisor that can run Linux.
To implement a seamless Linux integration into Starina, I decided to go with a Linux lightweight VM approach similar to WSL2. This means I need to implement a hypervisor that can run Linux.
RVPC Adds Basic Interpreter to €1 Open Source RISC-V Computer
(linuxgizmos.com)
The RVPC, a fully open source hardware and software retro-style computer project built around the CH32V003 microcontroller, now supports a BASIC interpreter.
The RVPC, a fully open source hardware and software retro-style computer project built around the CH32V003 microcontroller, now supports a BASIC interpreter.
Felix86: Run x86-64 programs on RISC-V Linux
(felix86.com)
felix86 is a new x86-64 userspace emulator for RISC-V devices.
felix86 is a new x86-64 userspace emulator for RISC-V devices.
Felix86: Play x86-64 games on RISC-V
(github.com/OFFTKP)
felix86 is a Linux userspace emulator that allows you to run x86-64 Linux programs on RISC-V processors
felix86 is a Linux userspace emulator that allows you to run x86-64 Linux programs on RISC-V processors
OrangePi RV2: The New Reference SBC for RISC-V Enthusiasts
(boilingsteam.com)
OrangePi is fairly famous by now as an alternative manufacturer for Raspberry Pi-like mini-computer boards, usually based on ARM processors (but not only). Very recently they announced the upcoming availability of a new board, the OrangePi RV2, based on a new RISC-V SOC (the Ky X1, with 8 cores running at 1.6 Ghz).
OrangePi is fairly famous by now as an alternative manufacturer for Raspberry Pi-like mini-computer boards, usually based on ARM processors (but not only). Very recently they announced the upcoming availability of a new board, the OrangePi RV2, based on a new RISC-V SOC (the Ky X1, with 8 cores running at 1.6 Ghz).
Banana Pi BPI-RV2 RISC-V gateway board
(banana-pi.org)
Banana Pi BPI-RV2 open source gateway is a device based on Siflower SF21H8898 SoC, 1 × 2.5G WAN network interface, 5 Gigabit LAN network interface, onboard 512MB DDR3 memory, 128 MiB NAND, 16 MiB NOR, M.2 interface, MINI PCIE and USB 2.0 interface, etc.
Banana Pi BPI-RV2 open source gateway is a device based on Siflower SF21H8898 SoC, 1 × 2.5G WAN network interface, 5 Gigabit LAN network interface, onboard 512MB DDR3 memory, 128 MiB NAND, 16 MiB NOR, M.2 interface, MINI PCIE and USB 2.0 interface, etc.
Efficient Architecture for RISC-V Vector Memory Access
(arxiv.org)
Vector processors frequently suffer from inefficient memory accesses, particularly for strided and segment patterns.
Vector processors frequently suffer from inefficient memory accesses, particularly for strided and segment patterns.
OrangePi RV2: The New Reference SBC for RISC-V Enthusiasts – Full Review
(boilingsteam.com)
OrangePi is fairly famous by now as an alternative manufacturer for Raspberry Pi-like mini-computer boards, usually based on ARM processors (but not only). Very recently they announced the upcoming availability of a new board, the OrangePi RV2, based on a new RISC-V SOC (the Ky X1, with 8 cores running at 1.6 Ghz).
OrangePi is fairly famous by now as an alternative manufacturer for Raspberry Pi-like mini-computer boards, usually based on ARM processors (but not only). Very recently they announced the upcoming availability of a new board, the OrangePi RV2, based on a new RISC-V SOC (the Ky X1, with 8 cores running at 1.6 Ghz).
Run RISC-V Binaries on AMD Zen-Series CPUs via Microcode Modification
(rvspoc.org)
Current AMD Zen-series CPUs (e.g., EPYC 9004 series) have begun integrating RISC-V coprocessors for specific acceleration tasks.
Current AMD Zen-series CPUs (e.g., EPYC 9004 series) have begun integrating RISC-V coprocessors for specific acceleration tasks.
Ubuntu Adds Support for New Low-Cost RISC-V Board: The OrangePi RV2 8GB For –$64
(phoronix.com)
Canonical announced today they have released Ubuntu developer images for the Orange Pi RV2, a new RISC-V single board computer that is low-cost with the SBC featuring 8GB of RAM costing just $64 USD.
Canonical announced today they have released Ubuntu developer images for the Orange Pi RV2, a new RISC-V single board computer that is low-cost with the SBC featuring 8GB of RAM costing just $64 USD.
First 1-nanometre RISC-V chip made in China with 2D materials
(scmp.com)
Chinese scientists have developed the world’s most complex two-dimensional (2D) semiconductor microprocessor, with the chip set to enter pilot-scale production.
Chinese scientists have developed the world’s most complex two-dimensional (2D) semiconductor microprocessor, with the chip set to enter pilot-scale production.
"Moonshots" Initiative to Secure the Future of RISC OS
(riscosopen.org)
Cambridge, UK – 28-Mar-2025 – RISC OS Open Limited (ROOL) is calling on the global technology community to support a bold new initiative to secure the long-term future of RISC OS. The company today announced the launch of its Moonshots programme – a strategic shift away from incremental development, towards large-scale engineering efforts aimed at modernising the operating system for next-generation Arm architectures.
Cambridge, UK – 28-Mar-2025 – RISC OS Open Limited (ROOL) is calling on the global technology community to support a bold new initiative to secure the long-term future of RISC OS. The company today announced the launch of its Moonshots programme – a strategic shift away from incremental development, towards large-scale engineering efforts aimed at modernising the operating system for next-generation Arm architectures.
Not dropping RISC-V support after all, maybe
(chimera-linux.org)
As circumstances have changed, we are not dropping RISC-V repos for the time being. Instead, newly rebuilt repositories are introduced, built on hardware, with tests.
As circumstances have changed, we are not dropping RISC-V repos for the time being. Instead, newly rebuilt repositories are introduced, built on hardware, with tests.
Chimera Linux ghosts RISC-V because there's no time for sluggish hardware
(theregister.com)
The creators of the unique Chimera Linux distro are dropping support for RISC-V because kit built on the open instruction set architecture just isn't fast enough and this is holding up the development pipeline.
The creators of the unique Chimera Linux distro are dropping support for RISC-V because kit built on the open instruction set architecture just isn't fast enough and this is holding up the development pipeline.
10-cent RISC-V MCU features 2.4GHz wireless, Bluetooth LE 5.0, USB 2.0
(cnx-software.com)
Patrick Yang, CTO at WCH, has recently unveiled the CH570 RISC-V SoC with 2.4GHz wireless and USB 2.0 (host & device) as an upgrade to the popular CH32V003 general-purpose RISC-V MCU with more features at the same low price (10 cents).
Patrick Yang, CTO at WCH, has recently unveiled the CH570 RISC-V SoC with 2.4GHz wireless and USB 2.0 (host & device) as an upgrade to the popular CH32V003 general-purpose RISC-V MCU with more features at the same low price (10 cents).
Dropping RISC-V Support
(chimera-linux.org)
The next set of images will drop RISC-V support. The builder is currently still going but within the next few days it will stop, and the repositories will stay in place but frozen.
The next set of images will drop RISC-V support. The builder is currently still going but within the next few days it will stop, and the repositories will stay in place but frozen.
Dropping RISC-V Support
(chimera-linux.org)
The next set of images will drop RISC-V support. The builder is currently still going but within the next few days it will stop, and the repositories will stay in place but frozen.
The next set of images will drop RISC-V support. The builder is currently still going but within the next few days it will stop, and the repositories will stay in place but frozen.
RISC-V Processor Design – Lec 6 – EXU and Co-Simulation
(ycombinator.com)
In this lecture, we stitch together a custom Instruction Set Simulator I created with the RISC-V CPU (now with the execution stage) and see the first instructions flowing in the pipeline.
In this lecture, we stitch together a custom Instruction Set Simulator I created with the RISC-V CPU (now with the execution stage) and see the first instructions flowing in the pipeline.
Europe Takes Another Whack at Homegrown Compute Engines
(nextplatform.com)
With RISC-V International, the body controlling the RISC-V instruction set, located in Switzerland for the past five years, RISC-V now has just as much right to call itself indigenous to Europe as does Arm Ltd, the British chip company that finds itself on the other side of the English Channel after the Brexit break up and that is still around 90 percent owned by Japanese conglomerate SoftBank.
With RISC-V International, the body controlling the RISC-V instruction set, located in Switzerland for the past five years, RISC-V now has just as much right to call itself indigenous to Europe as does Arm Ltd, the British chip company that finds itself on the other side of the English Channel after the Brexit break up and that is still around 90 percent owned by Japanese conglomerate SoftBank.
DC-ROMA RISC-V AI PC, RISC-V Mainboard II for Framework Laptop 13
(deepcomputing.io)
The DC-ROMA RISC-V AI PC, aka the DC-ROMA RISC-V Mainboard II for Framework Laptop 13, enables local execution of large language models (LLMs), allowing AI applications to call local LLM APIs without relying on cloud services.
The DC-ROMA RISC-V AI PC, aka the DC-ROMA RISC-V Mainboard II for Framework Laptop 13, enables local execution of large language models (LLMs), allowing AI applications to call local LLM APIs without relying on cloud services.