Hacker News with Generative AI: PCIe

PCIe Endpoint on Xilinx 7-Series FPGAs with PCIe_2_1 Hard Block and GTP (github.com/regymm)
PCIe Endpoint on Xilinx 7-Series FPGAs using the PCIE_2_1 hard block and GTP transceivers. No proprietary Vivado IP cores! Compatible with openXC7!
Hardware, FPGAs, Xilinx, Open Source, PCIe
34 points by transpute 28 days ago | 0 comments
Pi modder successfully adds M.2 slot to Pi 500 (jeffgeerling.com)
As I briefly mentioned yesterday, someone mentioned in this blog's comments a successful M.2 socket installation on the empty header on the Pi 500 (something I attempted, rather poorly!). With a few added components, and 3.3V supplied to a pad on the bottom via a bench power supply, the M.2 slot works just fine, allowing the use of NVMe SSDs or other PCIe devices.
Hardware, Raspberry Pi, DIY, SSD, PCIe
8 points by LorenDB 134 days ago | 0 comments
Micron launches 60TB PCIe gen5 SSD with 12GB/s read speeds (micron.com)
The Micron 6550 ION SSD is the world’s first 60TB PCIe Gen5 data center SSD, built to deliver unparalleled performance, energy efficiency and density.
Hardware, SSD, Data Centers, PCIe, Performance
142 points by Lwrless 164 days ago | 66 comments
Optical PCIe 7.0 connection hits 128 GT/s (tomshardware.com)
Hardware, PCIe, Networking
204 points by WithinReason 313 days ago | 133 comments
PCI-Sig Completes CopprLink Cabling Standard: PCIe 5.0 and 6.0 Get Wired (anandtech.com)
PCIe, Hardware, Standards, Networking, Technology
19 points by PaulHoule 354 days ago | 1 comments
PCIe 5.0 is nearly 4 years old and it's still virtually worthless in gaming PCs (pcgamer.com)
PC Gaming, Hardware, PCIe, Technology
27 points by speckx 361 days ago | 22 comments