Hacker News with Generative AI: AVX-512

Bit-permuting 16 u32s at once with AVX-512 (blogspot.com)
The basic trick to apply the same bit-permutation to each of the u32s is to view them as matrix of 16 rows by 32 columns, transpose it into a 32 u16s, permute those u16s in the same way that we wanted to permute the bits of the u32s [1], then transpose back to 16 u32s. Easy:
Optimization, AVX-512, Low-Level Programming, Computer Architecture
51 points by dist1ll 39 days ago | 4 comments
Converting ASCII strings to lower case at crazy speeds with AVX-512 (lemire.me)
AMD Zen 4 and Zen 5, as well as server-side recent Intel processors, support an advanced set of instructions called AVX-512. They are powerful SIMD (Single Instruction, Multiple Data) instructions. Importantly, they allow ‘masked’ operations. That is, you can compute a mask and only do an operation on bytes indicated by the mask. Thus you can easily store only the first k bytes of a block of 64 bytes of memory as one instruction.
Computer Science, Optimization, AVX-512, Programming
15 points by kristianp 71 days ago | 1 comments
Intel Demonstrates Up to 48% Improvement for AVX-512 Optimized PostgreSQL (phoronix.com)
With the upcoming PostgreSQL 17 database server release there is some initial AVX-512 optimizations that are looking quite nice according to Intel's findings.
PostgreSQL, Database Performance, Optimization, AVX-512, Intel
5 points by rbanffy 127 days ago | 0 comments
Intel Demonstrates Up to 48% Improvement for AVX-512 Optimized PostgreSQL (phoronix.com)
With the upcoming PostgreSQL 17 database server release there is some initial AVX-512 optimizations that are looking quite nice according to Intel's findings.
PostgreSQL, Database Performance, AVX-512, Intel, Optimization
4 points by pella 128 days ago | 0 comments